The present invention relates to the use of expansion cards in computer systems.
Generally in computer systems and especially in personal computer systems, data are transferred between various elements such as a central processing unit (CPU), input/output (I/O) adapters, I/O devices, bus controllers (i.e., elements which can control the computer system such as bus masters or direct memory access (DMA) controllers and slaves), bus slaves (i.e., elements which are controlled by bus controllers) as well as memory devices such as the system memory. These elements are often interconnected via a system bus which is part of a system architecture. The architecture is designed for the movement of data, address and command information with or between these elements. In personal computer systems, one such architecture has become an industry standard and is known as the Family I or IBM/AT bus architecture.
The Family I bus architecture has become widely used by personal computers such as the 8-bit IBM PC and 16-bit IBM AT. The Family I bus architecture transfers information using eight parallel paths (an 8-bit wide bus) or 16 parallel paths (a 16-bit wide bus). A significant feature of the Family I bus architecture is the requirement of performing all transfers in synchronization with one basic clock signal. The clock signal is an 8 MHZ signal which is provided to every element which is connected to the bus.
Because of the popularity of the Family I bus architecture, it has become advantageous to extend the Family I architecture to a 32-bit wide format. However, some customers may wish to maintain downward compatibility with the original Family I bus architecture. One such extended Family I architecture is the Extended Industry Standard Architecture (EISA). EISA is described in the EISA Specification, BCPR services, Inc., (1989).
Another architecture is available from IBM Corporation under the trademark Micro Channel. Micro Channel computers provide a 32-bit format which is not compatible with the Family I architecture.